Recently, a so-called shallow trench isolation (STI) is widely employed as a device isolation technique in the field of manufacture of semiconductor devices.
The STI process involves the steps of forming a trench in Si of a silicon substrate by dry etching; filling the trench with an insulating material such as SiO2 by CVD; and finally performing planarization by, for example, CMP.
The STI requires a trench etching process for forming a trench in single crystalline silicon by anisotropic etching. Prior to such a trench etching process, a thermal oxide layer made of SiO2 or the like and, for example, a silicon nitride (SiN) layer are formed on a surface of the silicon substrate made of Si; and a resist pattern is formed by employing a conventionally-used photolithography technique; and then the SiN layer and the thermal oxide layer are patterned by employing the resist pattern as a mask.
Subsequently, the resist pattern is removed, and then the trench etching process is executed by using the SiN layer and the thermal oxide layer as a mask to dry-etch an opening of the mask anisotropically.
Such a trench etching process is conventionally conducted by, for example, plasma etching, which employs as an etching gas, Cl2, a mixture gas of Cl2+O2, a mixture gas of Cl2+HBr, a mixture gas of Cl2+HBr+O2, or the like.
In the STI described above, the trench formed in the single crystalline silicon needs to be filled with a dielectric material, e.g., SiO2 or the like. To facilitate a secure filling process, the trench is usually formed to be tapered with a predetermined angle so that a sidewall of the trench is gradually widens from a bottom portion toward an upper opening thereof.
However, a sidewall profile of a trench tends to be varied locally even within a single wafer, e.g., depending on whether the trench is located at a central portion or a peripheral portion thereof, or depending on a width of the trench. Therefore, it is difficult to uniformly form all trenches to have a desired sidewall profile.
Further, as the integration density of semiconductor devices is rapidly increased recently, an ever increasing demand for miniaturization of various devices formed on the silicon substrate becomes one of the most challenging technical requirements to be met. As the miniaturization further progresses, an etching area also becomes getting smaller when performing an etching in the STI process as described above. As a result, the processed portion formed on the silicon substrate is likely to be sharply edged and the width of the trench formed for the device isolation is also further reduced. Consequently, it becomes difficult to fill the trench with the insulating material. For this reason, it is essential to develop a trench profile facilitating the filling of the insulating material into the trench as the miniaturization of various devices further progresses.
By forming the trench with a profile adequate for facilitating the filling of the insulating material, a device isolation efficiency will improve, while preventing the occurrence of a leakage current or a post-filling stress. As for a trench profile, it is preferable that a bottom portion of the trench is of a shape as round as possible than edged. Furthermore, it is also preferable that a boundary portion between Si and a mask made of the SiN layer and the thermal oxide layer on the sidewall of the trench is formed in a round shape.
Conventionally, however, it has been very hard to round the bottom portion of the trench and the boundary portion between Si and the mask on the sidewall of the trench because the trench is formed in a single plasma processing employing a process gas such as Cl2, as explained above.